Evaluate a test’s sample items, practice tests, directions, answer sheets, manuals, and score reports for appropriateness and for the intended purpose of the instrument.​

Evaluate a test’s sample items, practice tests, directions, answer sheets, manuals, and score reports for appropriateness and for the intended purpose of the instrument.​.

Practice tests

Evaluate a test’s sample items, practice tests, directions, answer sheets, manuals, and score reports for appropriateness and for the intended purpose of the instrument.​

Fair and Appropriate Materials
  • Analyze a test’s procedures and materials as presented by the test developers for appropriateness and for the intended purpose of the instrument.​
  • Analyze a test’s use or availability of modified forms or administration procedures for test-takers with disabilities who need special accommodations for appropriateness and for the intended purpose of the instrument.​
  • Analyze how advances in technology have been used to address issues of test items, procedures, and appropriate and fair usage.​
  • Evaluate one AERA standard for Supporting Documentation for Tests that is implicated in either the positive or negative aspects of the selected test.
Section Three: References
  • Locate a minimum of five resources (a minimum three peer-reviewed journal articles) pertaining to your test’s construction, item development, procedures utilized in construction to minimize offensive content, and provisions of modifications and accommodations for test-takers. You will not be required to have a copy of your test to complete this assessment. You may use many different types of references and sources to obtain this information about your test. These references may include journal articles, literature reviews, Mental Measurements Yearbook (MMY) reviews, and publisher websites.

Additional Requirements

  • The summary on Elements 6, 7, and 8 (See Section Two) must be at least 5 pages in length. These pages do not include the title page (Section One), or References (Section Three).
  • Write clearly and logically, with correct use of spelling, grammar, punctuation, mechanics, and current APA format and style.
  • Times New Roman font, 12 pt.
  • Double-spaced.
  • Use Turnitin to review your assessment before submitting it for grading.
Reference

Joint Committee on Testing Practices. (2004). Code of fair testing practices in education. Retrieved from http://www.apa.org/science/programs/testing/fair-testing.pdf

Evaluate a test’s sample items, practice tests, directions, answer sheets, manuals, and score reports for appropriateness and for the intended purpose of the instrument.​

Bonus Points Opportunity

Bonus Points Opportunity.

Bonus Points Opportunity

These points will be added to your raw Test 1 score out of 50

The purpose of this assignment is two-fold. First, it is to give you a chance to earn an extra 15 points
that will be added to your raw Test 1 score out of 50. Second, since we will soon be learning finite elements
of beams and frames, we need to refresh our knowledge of shear force and bending moment diagrams that
we learnt in prior classes. Please follow the instructions below:
INSTRUCTIONS:
1. This is a strict “No Collaboration Whatsoever” assignment. i.e., Type-I. You will need to include an
honor pledge that you did this work entirely on your own, without assistance from other humans, and
without assistance from solutions from prior semesters.
2. Note that solution hints are included at the end of this assignment.
3. Create a new folder on your computer. Give this folder a name which includes your last name. Place in
this folder your MATLAB files, along with a README.txt file that tells us how to run your program.
4. Include in the README file your honor pledge that you did this work on your own. Assignment will
NOT be graded if the honor pledge is missing.
5. Create a “zip” archive of this folder, and upload on Blackboard.
Design of the optimum support location for a beam
The beam AB shown above is hinged at B and is supported by a roller at D. This support D is to be
designed to carry a load uniformly distributed from its end A to its midpoint C with maximum efficiency.
The objective here is to find the best location for the support D, i.e., to find the best value of the distance
a (which we will call a

).
The design will be optimum when you place the roller support D such that the maximum of the absolute
value of the bending moment in the beam is minimized.
i.e., your design should be such that the peak of the bending moment magnitude is as small as possible.
Note that the bending moment M(x) varies with x along the length of the beam from A to B.
Your task list
Write a MATLAB program to solve this problem. Your MATLAB program should report all of the following:
1. the optimum location of the support, i.e., a

,
2. the corresponding absolute value of the maximum bending moment,
3. the location along the beam where this extreme value of the bending moment is attained,
4. a plot of the bending moment diagram for this optimum support location.
Solution hints are on the next page.

Bonus Points Opportunity

Engineering related ethics/disaster cases

Engineering related ethics/disaster cases.

Engineering related ethics/disaster cases

— Search the web for an engineering related ethics/disaster cases and select one interesting case to study and write about it.
— Write a typewritten report of no less than 500 words which includes the following:
a) An introduction of the case (what happened)

b) Engineering ethics issue: comment on this in the light of IEEE code of ethics.
1. · to hold paramount the safety, health, and welfare of the public, to strive to comply with ethical design and sustainable development practices, and to disclose promptly factors that might endanger the public or the environment;

2. · to avoid real or perceived conflicts of interest whenever possible, and to disclose them to affected parties when they do exist;

3. · to be honest and realistic in stating claims or estimates based on available data;

4. · to reject bribery in all its forms;

5. · to improve the understanding by individuals and society of the capabilities and societal implications of conventional and emerging technologies, including intelligent systems;

6. · to maintain and improve our technical competence and to undertake technological tasks for others only if qualified by training or experience, or after full disclosure of pertinent limitations;

7. · to seek, accept, and offer honest criticism of technical work, to acknowledge and correct errors, and to credit properly the contributions of others;

8. · to treat fairly all persons and to not engage in acts of discrimination based on race, religion, gender, disability, age, national origin, sexual orientation, gender identity, or gender expression;

9. · to avoid injuring others, their property, reputation, or employment by false or malicious action;

10. · to assist colleagues and co-workers in their professional development and to support them in following this code of ethics.

c) Mitigation: Explain what were the causes of problem/failure/disaster. What mitigation plan would you recommend to avoid this issue in future.

d) Lessons and Conclusions

e) Reference

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Engineering related ethics/disaster cases

Protection device from nuclear radiation

Protection device from nuclear radiation.  

Protection device from nuclear radiation

The idea of ​​the project is to invent and manufacture a device used in a nuclear power plant. What is required is to write about the parts of this device:

  • First, this device detects the human through the use of a sensor and the function of this part of the device is to detect the human at a distance of 10 meters from all sides and directions.
  • Second, it also detects nuclear radiation (alpha, beta and gamma) by using a special sensor that has been used to detect these rays.
  • Third, through the collection of the first section, which includes the detection of human as well as the second section, which reveals the nuclear radiation and consists of the device
  • The method of operation of the device will be by detecting the presence of any nuclear radiation or any person coming to this plant or the target area will trigger a warning at the power plant.

So you should here write full page about this device as mentioned from the above points and how this device will operate and what are the most important advantages of this device and how it will serve positively in the power plant.

 

Note: References must be as internet link.

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Protection device from nuclear radiation

Design a simple digital circuit called a full adder.

Design a simple digital circuit called a full adder..

Design a simple digital circuit.

In this assignment, you will design a simple digital circuit called a full adder. Along the way,
you will learn to use the Altera field-programmable gate array (FPGA) tools to enter a schematic,
simulate your design, and download your design onto a chip.
After completing the assignment, you are required to turn in something from each part. Refer to
the “Deliverables” section at the end of this handout before beginning the assignment.
Note:
For additional information about how to use Quartus II, refer to the following tutorials on
BbLearn under the tutorials section:
• Getting Started with DE series boards
• Quartus II Introduction
• ModelSim GUI Introduction
• Using ModelSim
• DE2_Pin Table
Background: Adders
An adder, not surprisingly, is a circuit whose output is the binary sum of its inputs. Since adders
are needed to perform arithmetic, they are an essential part of any computer. The full adder will
be an integral part of the microprocessor that you design in later assignments.
A full adder has three inputs (A, B, Cin) and two outputs (S, Cout), as shown in Figure 1. Inputs A
and B each represent 1-bit binary numbers that are being added, and S represents a bit of the
resulting sum.
A B
S
Cout Cin +
Figure 1. Full adder
The Cin (carry in) and Cout (carry out) signals are used when adding numbers that are more than
one bit long. To understand how these signals are used, consider how you would add the binary
numbers 101 and 001 by hand:
1
101
+ 001
110
As with decimal addition, you first add the two least significant bits. Since 1+1=10 (in binary),
you place a zero in the least significant bit of the sum and carry the 1. Then you add the next
two bits with the carry, and place a 1 in the second bit of the sum. Finally, you add the most
significant bits (with no carry) and get a 1 in the most significant bit of the sum.
When a sum is performed using full adders, each adder handles a single column of the sum.
Figure 2 shows how to build a circuit that adds two 3-digit binary numbers using three full
adders. The Cout for each bit is connected to the Cin of the next most significant bit. Each bit of
the 3-bit numbers being added is connected to the appropriate adder’s inputs and the three sum
outputs (S2:0) make up the full 3-bit sum result.
S2
A1
B1
S1
A0
B0
S0
C1
C0
Cout + + +
A2
B2
Cin
Figure 2. 3-bit adder
Note that the rightmost Cin input is unnecessary, since there can never be a carry into the first
column of the sum. This would allow us to use a half adder for the first bit of the sum. A half
adder is similar to a full adder, except that it lacks a Cin and is thus simpler to implement. To
save you design time, however, you will only build a full adder in this assignment.
A B
S
Cout +
Figure 3. Half adder
1. Design
A partially completed truth table for a full adder is given in Table 1. The table indicates the
values of the outputs for every possible input, and thus completely specifies the operation of a
full adder. As is common, the inputs are shown in binary numeric order. The values for S (sum)
are given, but the Cout (carry out) column is left blank. Complete the table by filling in the
correct values for Cout so that adders connected as in Figure 2 will perform valid addition.
Inputs Outputs
Cin B A Cout S
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
Table 1. Partially completed truth table for full adder
From the truth table, we now want to implement our design using logic gates. The sum output (S)
can be produced from the inputs by connecting two 2-input XOR gates as shown in Figure 4.
You should convince yourself that this circuit produces the outputs for S as given in the table.
Figure 4. Schematic for sum logic
Using only two-input logic gates (AND, OR, XOR) and inverters (NOT), design a circuit
that takes A, B, and Cin as its inputs and produces the Cout output. Try to use the fewest
number of gates possible. Sketch your schematic.
2. Schematics
Now that you know how to produce both the sum (S) and carry out (Cout) outputs using simple
logic gates, you will now construct a working full adder circuit using real hardware. One way to
test your circuit before building it in hardware is to enter the schematic representation of your
logic into a software package. You can then simulate the circuit and test that it works the way
you expect it to. Some software packages are then capable of programming the schematic into an
integrated circuit. This semester we will be using the Altera Quartus II 13.0p2 Web Edition
software for these purposes. The Quartus software is a powerful and popular commercial suite
of applications used by hardware designers.
First, you will learn how to start a new project. Start the Quartus software from the Start menu.
If asked about the look and feel, choose Quartus II.
In the Getting Started Window, click on Create a New Project. In the New Project Wizard, set
the working directory to a good place in your home computer. Name the project Assignment1.
Make sure there are no spaces or unusual characters in the path or file name; the tools may
complain or silently misbehave if it has trouble with the file name. If prompted about whether to
create the directory, say Yes.
Click Next to go to the Add Files page. You won’t be using preexisting files, so click Next again
to the Family & Device Settings to select a chip. You’ll be using the Altera DE2 development
board, which contains a Cyclone II EP2C35F672C6 FPGA. Set the family to Cyclone II. Scroll
down and select the device (EP2C35F672C6) from the list of Available Devices. EP2C indicates
the Cyclone II family of chip. The 35-series is a medium-sized chip with 33,216 (approximately
35k) logic elements. F672 indicates a fine-pitch 672-pin ball grid array package. C6 indicates a
commercial-grade part (rated for operating temperatures of 0 – 85 ○C) and 6 is the slowest (and
cheapest) speed grade for this part.
Click Next to go to the EDA (Electronic Design Automation) Tool Settings. Set the Design
Entry/Synthesis Tool name to ViewDraw using EDIF (Electronic Design Interchange Format)
and the Simulation tool to Modelsim using Verilog HDL. Click Next and Finish to create your
new project.
The Quartus window will open in a moment. You may wish to maximize the window. You will
see three main panes, as shown in Figure 5 (and can bring them up from the View  Utility
Windows menu if you accidentally close one):
• Project Navigator: Lists the current project’s sources file and the chip in use.
• Tasks: Lists the processes to perform on the source selected in the Sources pane. For
example, we will use this pane later to simulate your completed schematic.
• Messages: Lists the output of current processes, errors, and warning at the bottom of the
screen. Keep an eye on these messages; important warnings appear here.
Figure 5. Quartus II window
We will describe some of the options for using these resources, but we also recommend
exploring these resources on your own to become familiar with Quartus’ capabilities. Use the
Help menu for additional information.
Quartus has a basic and strikingly ugly schematic editor that we will use. It is not particularly
sophisticated because designers today primarily use hardware description languages (HDLs)
instead of schematics. However, understanding schematics is an important first step to mastering
HDLs.
Create a new schematic by choosing File  New and selecting Block Diagram / Schematic File,
and click OK. A new schematic window named Block1.bdf will appear.
First, place your logic gates. Click on the Symbol Tool icon (shaped like an AND gate). Expand
the list of libraries in the upper left of the Symbol window by clicking on the arrow icons .
Look under primitives  logic and choose xor. Click OK, then click twice on the schematic
window to place two xor gates. Leave some room between the gates to draw a wire later. Press
the Esc key or right click and choose Cancel to get out of the placement mode.
Click on the Symbol Tool again and choose primitives  pin  input. Place three input pins on
the left side. Leave some space between the pins and the gates so that you can wire them
together later. Then choose an output pin and place it on the right. Double click on one of the
input pins and change its name to A. Leave the default value unchanged at VCC. Rename the
other inputs to B and Cin. Rename the output to S.
Use the Orthogonal Node Tool ( ) to wire the gates together. Click and drag to connect the
pins to gates and the two gates together. At this point, your schematic should resemble Figure 4.
It’s a good idea to click on the wire between the two XOR gates and give it a unique name such
as n1 or mid in case you need to debug later. (If you are using version 10 or higher, you can
name a wire by right clicking on the wire, selecting Properties, and adding the name).
If you need to make corrections, use the Selection Tool to grab and move gates or wires. Zoom
in and out by using the View menu or holding the Ctrl key while turning the mouse wheel. Use
delete and undo as necessary.
Choose File  Save and save your schematic as assignment1.bdf.
You are now ready to complete your schematic of the full adder by drawing the logic for Cout
that you designed in Part 1. Draw the necessary logic gates and wires to complete the circuit.
Use the existing input terminals for A, B, and Cin, and add an output terminal for Cout. The
symbols you may use to draw your logic gates are as follows: and2, and3, or2, or3, not, and xor.
Remember, do not add a second set of input ports for A, B, and Cin. Instead, note that you can
connect multiple wires to the same input ports (or you can connect wires to other wires to create
branches).
Select the Files tab in the Project Navigator pane to see a list of files of the project (presently just
assignment1.bdf). If you need to reopen the file later, double-click on it here.
To check your design, click on Start Compilation in the Task pane (ProcessingStart
Compilation). You’ll see a compilation report indicating five pins and 2 logic elements. Review
the warnings and errors carefully. You may get the following warnings that are harmless:
• Feature LogicLock only available with subscription.
• Ignored location or region assignments
• Found output pins without load capacitance
• Found invalid Fitter assignments
• Reserve All Unused Pins not specified
If you see other warnings or errors, track down their root cause before they lead you to grief
later.
3. Simulation
One motivation for drawing your full adder schematic in Quartus is that you can now use the
software to simulate the operation of the circuit. It is a good idea to verify the correctness of
your design before actually building the circuit in hardware. In this part of the assignment, you
will simulate the design using ModelSim.
ModelSim expects a description of a circuit in a hardware description language (HDL) such as
Verilog. To convert your schematic to Verilog, open the schematic and choose File  Create /
Update  Create HDL Design File for Current File. Choose Verilog HDL. Your file should be
written to assignment1.v. Watch for and correct any warnings or errors that arise.
Now fire up ModelSim SE 6.6ab from the Windows start menu. Maximize the ModelSim
window when it opens. If prompted, you may wish to associate file types with ModelSim but do
not want to use Jumpstart.
Choose File  New  Project. Name the project assignment1 and put it in the directory where
you are working. Accept the default library name of “work.” Then click “Add Existing File” and
add assignment1.v.
You should see assignment1.v in the ModelSim project pane. Double-click on it to view it. The
file should list the inputs and outputs and the wires (using default names if you didn’t name them
yourself). It should then have a series of “assign” statements describing the gates. & indicates
AND. | indicates OR. ^ indicates XOR. In future assignments you will learn to write Verilog
yourself.
Choose Compile  Compile All to compile the Verilog code into a form that ModelSim can
simulate. Watch for and correct errors in the transcript pane. Then choose Simulate  Start
Simulation. Click on Work to expand the library, and choose assignment1 as your module to
simulate. Uncheck “enable optimization” because it sometimes hides information that is useful
during debugging. Click Ok.
ModelSim will open more panes including sim and Objects that help you select signals for the
waveform viewer. In the sim pane, be sure assignment1 is selected. In the objects window,
you’ll see all the inputs, outputs, and internal wires. Shift-click to select them all. Then rightclick
and choose Add  To Wave  Selected Signals. A Wave pane will pop up with the
signals.
Now it is time to apply the inputs. Right click on A then click on force. A new window will
open as shown in figure 6. Assign 0 in the value field and click ok. Repeat for signals B and Cin,
assign 0 to all.
Figure 6. ModelSim force signal
Now it’s time to simulate, on the top panel enter 100ns on the time field and click on
run to simulate for 100ns. (Note that Verilog is case-sensitive; “A” and “a” are different.)
You should see all the inputs and outputs at a low level in the Wave pane. Next, raise A to 1 and
simulate for another 100ns. You’ll see A rise. If your design is correct, S will also rise.
Continue with the six other patterns of inputs to check your truth table.
If you have errors, you may want to look at the internal nodes to track down the problem. Fix
the schematic, then regenerate the Verilog file. Recompile and restart the simulation in
ModelSim.
If the waveform is not visible, click on the + button in the top right corner of the “wave-default”
pane to the right of the main ModelSim window (or choose ViewWave from the menu). Click
the “Zoom Full” icon in the taskbar to see the whole waveform of the simulation results. You
can also use the “Zoom In” and “Zoom Out” icons: . Check and see that the output values
(S and Cout) are correct. If not, go back and fix your schematic and re-simulate. When the output
values are correct, you have a working full adder! Save an image of the waveform. Make sure
the entire waveform is visible, select FileExportImage…, and save the file. If needed, you
can also print the waveform. Choose FilePrint to print a copy of your waveforms to turn in.
You can choose the start and end times in the bottom right of the print dialog box.
4. DE2 Board Implementation
Once your design simulates correctly, you may now close Modelsim and return to Quartus.
Your next goal is to download your circuit onto a DE2 board to test it on the FPGA. In
hardware, particular pins on the FPGA will correspond to the inputs and outputs of your design.
You’ll need to assign the pins so that you can use switches to control the inputs and LEDs to
display the outputs. Choose Assignment\Pin Planner, a new window will open and you can
specify the connections to all ports in the location field that corresponds to each port. Refer to
“DE2_Pin_Table” file on BbLearn for a complete list of pin names. After completing assigning
all ports, save and exit the pin planner.
Figure 7. Pin Planner
In the Tasks pane, recompile the design. Now it is time to connect and program the device:
• Connect the DE2 board to the computer using a USB cable. The cable should go into the
leftmost USB jack on the board labeled BLASTER.
• Switch S9 should be in the RUN position.
Check that the board is turned on (press the red power button); the blue Power and Good LEDs
should turn on.
Choose Tools  Programmer. Check that the Hardware Setup is set to USB-Blaster and the
mode to JTAG. The file should be assignment1.sof and the program/configure box should be
checked. Click Start to download your design.
You may ignore the large number of warning messages related to the unused pins.
Toggle the switches and check all possible inputs for correct output.
Deliverables
You must submit an electronic copy of the following items to BbLearn. Be sure to label each
section and organize them in the following order. Messy or disorganized assignments will lose
points.
1. Please indicate how many hours you spent on this assignment. This will be helpful for
calibrating the workload for next time the course is taught.
2. Write a few sentences describing the purpose of this assignment.
3. Include your completed truth table, including the values in the Cout column.
4. Include the following figures:
• Your completed schematic, including the logic gates for both S and Cout. This can be
produced using the FileExport feature in the Schematic Editor (you may need to select
.bmp format).
• Your simulation of the full adder, including all inputs and outputs. This can be produced
using the FileExportImage… feature of the ModelSim Simulator.
5. Did your full adder on the DE2 board pass work for all eight possible inputs?
If you have suggestions for further improvements of this assignment, you’re welcome to include
them at the end of your submission.

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Design a simple digital circuit called a full adder.

Create a proper plot of the estimated Revenue and Cost in Excel to be turned in. Make the graph with the number of units on the X-Axis

Create a proper plot of the estimated Revenue and Cost in Excel to be turned in. Make the graph with the number of units on the X-Axis.

estimated Revenue and Cost in Excel

Turn in a copy of the spreadsheet used to make the graph and a word document with the answers to the questions and the graphs made in excel pasted into the document.

 

  1. Your company has invented a new solar panel that is far superior to current materials. A new facility and manufacturing line will cost $7.5 Million. A contract is negotiated with a materials supplier to provide all of the raw material necessary for $27 per panel. Labor and overhead adds another $15 per panel. The panels will be sold for $90 each.
    • Create a proper plot of the estimated Revenue and Cost in Excel to be turned in. Make the graph with the number of units on the X-Axis.
    • Make sure to label the X and Y axis correctly and label the graph.
    • Sketch a breakeven chart for this scenario on the graph, assuming you plan to manufacture a total of one million Panels.
    • How many panels must the company make and sell to breakeven? Check your answer mathematically and round up to the nearest number of panels sold.
    • How many panels must be manufactured and sold to make a profit of $10,000,000? Check your answer mathematically and round up to the nearest number of panels sold.

 

  1. In many engineering uses, the value of “ g, ” the acceleration due to gravity, is taken as a constant. However, g is actually dependent upon the distance from the center of the Earth. A more accurate expression for g is:

 

 

Here, g0 is the acceleration of gravity at the surface of the Earth, A is the altitude, and Re is the radius of the Earth, approximately 6,380 kilometers. Assume g0 = 9.8 meters per second squared. What is the value of g at an altitude of 20 miles in units of meters per second squared?

 

 

 

  1. The space shuttle fleet was designed with two booster stages. If the first stage provides a thrust of 5.25 Mega-newtons and the space shuttle has a mass of 4,470,000 pound-mass, what is the acceleration of the spacecraft in miles per hour squared?

 

 

 

 

 

 

 

 

 

 

 

  1. The weight of a can of soda on the moon (where the acceleration of gravity is 1.6 meters per second squared) is 0.6 newtons. What is the mass of the can of soda on the Earth in units of kilograms?

 

 

 

 

 

 

 

 

 

 

 

  1. An object has a weight of 120 pound-force [lbf] on the Moon, where gravity is 1.62 [m/s^2 ]. Find the mass of the object in units of pound-mass [lbm] on Earth, where gravity is 9.8 [m/s^2]. What is the weight of the object on Earth in newtons?

 

 

 

 

 

 

 

 

 

 

 

 

  1. Which of the following plastics has the highest melting temperature? You must prove your answer for credit!
  1. Acrylic at 150 degrees Fahrenheit.
  2. Polyethylene terephthalate (PET) at 423 kelvins.
  3. High-density polyethylene (HDPE) at 710 degrees Rankine.

 

 

 

 

 

 

 

 

 

 

 

 

  1. The tiles on the space shuttle are constructed to withstand a temperature of 1,950 kelvins. What is the temperature in units of degrees Fahrenheit, degrees Celsius, and degrees Rankine? Show your work.

 

 

 

 

 

 

 

 

 

 

 

 

  1. Using the equations given for temperature conversion, derive an equation to convert directly from Kelvin to Fahrenheit and directly from Rankin to Kelvin.

 

[°F] = 1.8 * [°C] + 32

[K] = [°C] + 273

[°R] = [°F] + 460

 

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Create a proper plot of the estimated Revenue and Cost in Excel to be turned in. Make the graph with the number of units on the X-Axis

Data collection and analysis.

Data collection and analysis..

Data collection and analysis.

a. Decide on something you are going to measure. In your initial post write up, include the following. Keep an industrial focus if possible but you can measure anything. The measurement instrument can be anything, e.g., your eyes, a bath scale, a micrometer, etc.

i. Define the population measured.

ii. Define the unit of observation (e.g., case, subject).

iii. Define the sample measured and state the sample size (must be at least n=10).

iv. Describe the variable measured. Include scale level, i.e., nominal, ordinal, interval, or rank.

v. Describe the measurement tool and measurement method.

vi. Define the variable values measured and/or that could have been measured, e.g., there might have been green apples but none in your sample were.

vii. Calculate appropriate measures of central tendency and dispersion.

viii. Create an appropriate chart to display the data. Does the data look like it fits a particular distribution; should it, i.e., does the data fit the definition of a particular distribution?

b. Similar to example 5.8 in the Primer, calculate the mean and 3 sigma limits for 10 coin tosses. Toss an actual coin 10 times and compare the theoretical and actual results*. Are the theoretical and actual results different? If so, why? How do you interpret the control limits, e.g., what do they tell us?

c. Create your own probability example of compound events* (similar to examples 5.20 – 5.23 in the Primer).

d. Discuss the general principles of how to make something more reliable.

e. Do your own failure experiment.* Calculate Lambda and Theta.

Obviously, for a you have to measure something yourself and cannot get data from a source such as the internet, book, or company data.

For b, follow the example but use the values you need to for 10 coin tosses. You have to actually toss the coin to compare the theoretical population results with your actual sample results.

For c, come up with your own example. The goal is to make you practice with something more real than the text book. Do not get an example from any source except your life or your imagination.

For e, you could test anything to failure. I would pick something that fails in short order under testing, e.g., flexing something until it breaks (the bends can be the unit instead of time, but time would work too if you keep your flex rate constant). You could consider a basketball shot the event and a miss as a failure. You could bother your roommate until he or she gets mad (the failure) and see how long that takes (maybe that isn’t a good idea)! The point is to really do this, with something simple if need be (and not use an internet or book example and merely change some words around).

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Data collection and analysis.

You are responsible for creating documentation for instructions to assist future clients in assembly of a new prototype device

You are responsible for creating documentation for instructions to assist future clients in assembly of a new prototype device.

New prototype device

You are responsible for creating documentation for instructions to assist future clients in assembly of a new prototype device. The future clients will likely not be aware of the functionality and design of the device, so instructions will need to be clear and concise in explaining to them the proper way to assemble the prototype.  Your documentation instructions must be done only in writing. Pictures, videos, and drawings are not allowed to be part of the created instructions. Your set of instructions must also include a bill of materials (BOM). Be sure to follow good form in the creation of your instructions (see pages 113 and 114 in the Sorby text). Written instructions must be typed and submitted as a Word document. The instructions should be easy to follow (good organization and flow).  Each student is responsible for creating their own, unique set of instructions that they created on their own.

 

 

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If the engine is operating at 80% efficiency, determine the speed of the car neglecting drag and rolling resistance

If the engine is operating at 80% efficiency, determine the speed of the car neglecting drag and rolling resistance.

The speed of the car neglecting drag and rolling resistance

1- A car is driving up a 10° slope. The engine of the 3500 llbbff car is generating a constant

power of 50 hpp while the car is travelling a constant speed. If the engine is operating at 80%

efficiency, determine the speed of the car neglecting drag and rolling resistance.

2- An elevator and load have a total mass

of 1600 kg. It is balanced by a

counterweight with a mass of 300 kg.

At a given instant, the hoist has an

upward velocity of 2 mm/ss and an

acceleration of 1.5 mm/ss2. Determine

a. The power output from the motor.

b. If the motor has an efficiency of

εε = 0.80, what is the power

generated by the motor?

3- The roller coaster car has a mass of 800 kg including its passenger and start from the top of a

hill with a speed of vv0 = 3 m/s. Determine the minimum height H of the hill so that the car

travels around the loop without leaving the track. The distance from A to B is 10 m. Neglect

friction , mass of the wheels, and the size of the car.

4- A 180 lbf man bungee jumps off a bridge with an initial downward speed of 6 ft/s . The

bridge is 450 f above the surface of the water and the stiffness of the cord is 100 ibf/f.

Determine the length of cord to which he is attached in order to stop momentarily above the

surface of the water.

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If the engine is operating at 80% efficiency, determine the speed of the car neglecting drag and rolling resistance

Traffic Characteristics

Traffic Characteristics.

Traffic Characteristics

 

  1. Assuming that a driver with a visual acuity of 20/20 can read a road sign within his area of vision at a distance of 50 ft for each inch of letter height, prepare a table with required letter heights for signs 100 ft, 500 ft, and 1000 ft for drivers with acuities of 20/20, 20/40, and 20/70.

 

  1. A vehicle has a maximum acceleration rate of 10 ft/sec2 is entering a merging area using a 600 ft acceleration lane at an initial speed of 15 mph where the free speed in the merging area is 70 mph.

 

  1. a) Using basic equations of motion, determine the maximum speed the ramp driver can attain by merging at the end of the acceleration lane.

 

  1. b) Using basic equations of motion, determine the minimum length of the acceleration lane that would allow the merging vehicle to merge safely with through traffic if the minimum safe merging speed is equal to the free speed minus 10 mph.

 

  1. A driver traveling at 30 mph behind another car decides to pass it and presses the accelerator to the floor. Assuming that the accelerating behavior of the vehicle may be described by

 

 

where v is the speed in ft/sec and t is the time in seconds.

 

  1. Find the rate at which the vehicle is accelerating after 3 sec.
  2. How long would it take the vehicle to reach a speed of 50 mph?

 

 

  1. Draw an Excel graph to relate the following:
  2. a) Operating speed versus vehicle density
  3. b) Traffic volume versus vehicle density.

 

  1. You are required to re-design SR 87 from MP 188.83 to MP 190.84. Using data available in the ADOT website and the ADOT Design Manual determine the following:
  2. AADT (latest year), K, D, and T
  3. What level of service should this road be designed for?
  4. What is the design speed?
  5. How many lanes are needed in each direction for a 2038 design year assuming a 4% traffic growth per year? Assume a design volume of 1,800 vehicles/hour/lane.

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Traffic Characteristics